CURRENT FEATURE ARTICLES

Three Chords and the Truth
Aart de Geus and Synopsys go Quick to Four
(Kevin Morris)
Avoiding Failure Analysis Paralysis
Cadence Describes the DFM-Diagnostics Link
(Bryon Moyer)
Almost Instant Replay
Mentor Announces Codelink for Debugging Processor-Driven Tests (Bryon Moyer)
The Spirit of Standardization
IP Re-use Takes Center Stage (Kevin Morris)
Accommodating Change
Cadence Announces a Front-End ECO Tool
(Bryon Moyer)
Making Quality Everyone’s Business
A Quick Look at isQED (Bryon Moyer)

JOURNAL WEBCASTS

NEW!! CHALK TALK Low Power Design With Xilinx and Linear Technology. Join Amelia Dalton as she chats with Mark Moran of Xilinx and Afshin Odabaee of Linear Technology about low power FPGA based designs. (Xilinx)

CHALK TALK Designing Embedded Systems With Linux and low cost FPGAs. Join Amelia Dalton as she chats with industry experts about simplifying embedded systems design with Linux running on low-cost programmable system-on-chip platforms. (Xilinx)

CHALK TALK Lowest Total System Cost With Xilinx
Spartan-3. Amelia Dalton chats with Mark Moran of Xilinx about reducing your overall system cost with Xilinx Spartan-3 family of FPGAs (Xilinx)

CHALK TALK Low Cost FPGA with Serdes Lattice ECP2M. Amelia Dalton talks with Bertrand Leigh of Lattice Semiconductor about low-cost FPGAs with multi-gigabit SerDes interface capability. (Lattice Semiconductor)

CHALK TALK Crossing the Gap between Algorithm and Hardware Implementation. Join Amelia Dalton as she learns how C++ and Catapult C Synthesis can accelerate the design, implementation, and verification of complex system-level algorithms. (Mentor Graphics)

Approaching Yield in the Nanometer Age - DFM Methodology. As we dive deeper into the nanometer era, we must rethink the way we design. Tools, techniques, and methods that once worked without fail cannot hold up at the 65 and 45 nm depths, making it more challenging than ever to achieve yield. This tutorial explores these challenges within both the business and historical context of the IC design and manufacturing process. (Mentor Graphics)

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Three Chords and the Truth
Aart de Geus and Synopsys go Quick to Four (Kevin Morris)

Twelve Bar Blues is structured improvisation.  A standard twelve-measure chord progression repeats tirelessly, and the experienced blues musician lays his soul over this monotonous harmonic structure like a fine linen drapery.  Aart de Geus, President, CEO, and Co-Founder of Synopsys, the world’s second largest electronic design automation (EDA) company, is also an accomplished blues guitarist. 

Blues in C
I (C) Measures 1-4:
The tonic orients the ear, providing a firm foundation of reference.  In traditional blues, it is repeated for the first four bars of the sequence, setting up “home base” for the listener’s mind.  When Aart de Geus co-founded Synopsys over two decades ago, logic synthesis was the tonic - the root chord upon which the engineering-centric company was founded.  Logic synthesis set the key values of creativity, learning, and technological innovation that hardened the fledgling company so that it could survive and thrive in the tempestuous torments of two decades of The Moore’s Law blues.

“I played guitar starting around 14 years old,” begins de Geus.  “It was very much around the campfire, scouts, gospel, Bob Dylan – those types of things.  Then, somewhat by accident, I went to a couple of great blues concerts in Switzerland, where I grew up.  It just hit me – a guy by the name of T-bone Walker, who was considered one of the fathers of Blues, was performing there.  It was a big concert, not a small venue like a bar or anything, and after that I really never played anything else.”

De Geus may have found the Blues by accident, but he knew it felt right as soon as he was there.  When we asked how he came to choose electronic design automation as a career, the answer sounded familiar.

“I think many things have been accidental.  When I was in Switzerland, working on my Master’s thesis, I did some design, and I needed to figure out if it would work.  It’s a little embarrassing – I didn’t realize that simulators existed and so I wrote my own during my Master’s thesis.  Later, I was working on my PhD and in parallel working at General Electric. I just sort of slid into the EDA side because of the job I had and because of the advisor I had.” [more]