CURRENT FEATURE ARTICLES

ISSCC Processor Fest
(Bryon Moyer)
Bigger and Better Storage
(Bryon Moyer)
When Being One-Dimensional Is A Good Thing
Tela Innovations Announces Their Approach to Advanced Cell Layout (Bryon Moyer)
Migrating Complex Networking ASIC Verification Environment to SystemC and SystemVerilog
by Srinath Atluri, Nimalan Siva, and Anant Sakharkar (Cisco) and Rebecca Lipon (Synopsys)
A Merger of Unequals
Magma Announces the Union of Analog and Digital in Titan (Bryon Moyer)
Do Converging Standards Meet at Infinity?
(Dick Selwood)

JOURNAL WEBCASTS

CHALK TALK Crossing the Gap between Algorithm and Hardware Implementation. Join Amelia Dalton as she learns how C++ and Catapult C Synthesis can accelerate the design, implementation, and verification of complex system-level algorithms. (Mentor Graphics)

Approaching Yield in the Nanometer Age - DFM Methodology. As we dive deeper into the nanometer era, we must rethink the way we design. Tools, techniques, and methods that once worked without fail cannot hold up at the 65 and 45 nm depths, making it more challenging than ever to achieve yield. This tutorial explores these challenges within both the business and historical context of the IC design and manufacturing process. (Mentor Graphics)

CHALK TALK Accelerate SoC and ASIC Verification Using FPGA Prototypes. Join Amelia Dalton as she explores methods of ASIC verification available today and why FPGA-based prototypes offer the most affordable and most powerful solution. (Synplicity)

CHALK TALK Advancing SoC Verification Methods.
Join Amelia Dalton as she talks with experts from Mentor Graphics on processor-driven test and other techniques for solving your system-on-chip verification problems. (Mentor Graphics)

CHALK TALK Did you miss the ARM Developers' Conference? Join Amelia Dalton for Journal Webcasts' coverage of the event - it'll be just like you were there! (Journal Webcasts)

ISSCC Processor Fest
(Bryon Moyer)

There are some places it seems everyone wants to be. The Oscars. An inaugural ball. Mardi Gras. New Years in Times Square. (OK, pre-War on Terror.) Well there was a new member of this list last week that might not have sprung to mind immediately: the microprocessor session at ISSCC, packed to the gills. Four new processors were presented, plus one process migration to 45 nm. The bragging rights on such chips are typically all about performance (or performance efficiency), and everyone fusses over clock rates and bus sizes and various and sundry other numbers, but, in this article, we’ll focus away from the distracting lure of feeds and speeds. Anyone can look up the numbers in a datasheet, and the techno-paparazzi have assuredly posted pictures of the most lurid ones already. So we’ll focus on things that we found interesting in the new processors, assuming that what interests us will interest you.

Rising Sun
The session started with Sun’s CMT-3 processor, featuring sixteen cores. This chip abandons the standard out-of-order processing mechanism, which uses an in-order fetch followed by out-of-order execution and in-order retirement. The issue with this traditional scheme is that all instructions – including those successfully executed – are kept around so they can be retired in the order they were fetched. [more]

Bigger and Better Storage
(Bryon Moyer)

I don’t know what it is about people, but we seem to excel at accumulating more and more stuff and needing more and more space to put it. And it used to be that we only did it in the real world, amassing real things and then ensconcing them in public storage units until time to move to a new house – which means moving the stuff to a new public storage unit. But now we’re doing it in the virtual world as well, and we keep needing more room to put stuff. One place we store stuff is solid-state non-volatile memory. Yeah, we still use hard disks. But if solid state technology keeps on at the current rate, we can soon reach the much-desired goal of a solid state hard drive.

Last week’s ISSCC and DesignCon conferences included presentations of developments in non-volatile memory, and we present some highlights here. Some of the papers discussed developments in novel cell types; others addressed improvements in more well-adopted technologies. So first let’s review the different kinds of non-volatile cells being covered to set some context. [more]