a techfocus media publication :: March 18, 2008 :: volume I, no. 11

FROM THE EDITOR

This week, Bryon Moyer takes a look at Tela Innovations's innovative approach to problems with optical proximity correction (OPC) at today’s tiny geometries.  The tricks of the trade in getting beams of light to play nicely together now include a relatively one-dimensional solution.  Bryon’s latest feature explains.

Next, we have a contributed article from Srinath Atluri, Nimalan Siva, and Anant Sakharkar of Cisco Systems and Rebecca Lipon of Synopsys explaining how we can migrate our verification environment to higher-level languages like SystemC and SystemVerilog.  With the exploding complexity of ASIC verification, keeping up with the highest productivity methodologies while preserving some of our legacy investment is both tricky and essential.  

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Kevin Morris – Editor in Chief
Techfocus Media, Inc.

EVENTS & ANNOUNCEMENTS

Mentor Graphics' inFact testbench automation solution is the first to use intelligent algorithms to synthesize meaningful testbench sequences while alllowing the user to set verification goals prior to simulation and determine verification priorities. inFact simulation can realize a 10x gain in overall verification productivity. Workshops coming to your area soon.

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Understanding the cost and time restraints of the industry, PDI provides the perfect low maintenance out source solution for the production and shipping of your training manuals globally.  Through on-line ordering, version control, global coverage with localized production, efficiencies will be gained and costs controlled.

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CURRENT FEATURE ARTICLES

When Being One-Dimensional Is A Good Thing
Tela Innovations Announces Their Approach to Advanced Cell Layout
(Bryon Moyer)
Migrating Complex Networking ASIC Verification Environment to SystemC and SystemVerilog
by Srinath Atluri, Nimalan Siva, and Anant Sakharkar (Cisco) and Rebecca Lipon (Synopsys)
A Merger of Unequals
Magma Announces the Union of Analog and Digital in Titan
(Bryon Moyer)
Do Converging Standards Meet at Infinity?
(Dick Selwood)
Power Plays: Raising the Stakes
Synopsys Announces Eclypse for Low Power

(Bryon Moyer)
The Very Model Of Reusability
(Bryon Moyer)
Attacking Abuses of Power – Part 1
(Bryon Moyer)

JOURNAL WEBCASTS

CHALK TALK Crossing the Gap between Algorithm and Hardware Implementation. Join Amelia Dalton as she learns how C++ and Catapult C Synthesis can accelerate the design, implementation, and verification of complex system-level algorithms. (Mentor Graphics)

Approaching Yield in the Nanometer Age - DFM Methodology. As we dive deeper into the nanometer era, we must rethink the way we design. Tools, techniques, and methods that once worked without fail cannot hold up at the 65 and 45 nm depths, making it more challenging than ever to achieve yield. This tutorial explores these challenges within both the business and historical context of the IC design and manufacturing process. (Mentor Graphics)

CHALK TALK Accelerate SoC and ASIC Verification Using FPGA Prototypes. Join Amelia Dalton as she explores methods of ASIC verification available today and why FPGA-based prototypes offer the most affordable and most powerful solution. (Synplicity)

CHALK TALK Advancing SoC Verification Methods.
Join Amelia Dalton as she talks with experts from Mentor Graphics on processor-driven test and other techniques for solving your system-on-chip verification problems. (Mentor Graphics)


CHALK TALK Did you miss the ARM Developers' Conference? Join Amelia Dalton for Journal Webcasts' coverage of the event - it'll be just like you were there! (Journal Webcasts)


When Being One-Dimensional Is A Good Thing
Tela Innovations Announces Their Approach to Advanced Cell Layout
(Bryon Moyer)

Driving in the country and in the city are completely different experiences. In the country, there’s so little traffic that you really don’t need much in the way of rules. Roads intersect, maybe with a stop sign, maybe not; it’s expected that you will look as you approach and proceed with caution (unless you’re the Dukes of Hazzard). If people start moving into the area and the traffic gets busier, then at least one of the intersecting roads will need a stop sign to avoid outright chaos. If things continue to grow to the point where cars can never get past the stop sign because the cross-traffic has no gaps, then a stoplight has to go in to regulate who goes when and give everyone a fair shot. As density increases further, a grid pattern typically emerges, at least over small concentrated areas, if not the whole city (unless you’re Boston). Left turns get harder to make, so lights go up for protected lefts. Now the intersections have complicated signaling rules, an entire cycle can take a while, and attempting to get traffic to flow smoothly – ideally with timed lights – becomes less and less tractable. At some point, things just get too complicated, and something’s gotta give, or else traffic will come to a standstill. [more]


Migrating Complex Networking ASIC Verification Environment to SystemC and SystemVerilog
by Srinath Atluri, Nimalan Siva, and Anant Sakharkar (Cisco) and Rebecca Lipon (Synopsys)

Introduction
As the computer hardware industry strives to obey Moore’s Law, the telecommunication industry is following the even more rapid phenomena as described by Metcalfe’s Law: the potential number of contacts between each end computer increases rapidly, the effort to reduce the congestion at the network layer is greatly contributing to today’s system-on-chip (SoC) complexity.  As more and more optimizations are added to the upper layer protocols, low layer complexity increases to facilitate overall system feasibility.  Over the past decade, we have witnessed a dramatic increase in Gigabit Ethernet popularity.  Today as we experience the deployment of 10Gig/Ethernet, the buzz indicates 100 Gig/Ethernet is likely in the near future. [more]


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