HOME :: JOB
LISTINGS :: WEBCASTS :: ARCHIVES :: MEDIA
KIT :: SUBSCRIBE :: FORUMS |
|
|
| BusinessWire New Online Demo Shows Interoperable PCell Library Support by Five EDA VendorsFive IPL Alliance Members Demonstrate That a Single PCell Library Supports a Complete Custom IC Flow Including Schematic, Layout and DRC Tools, Enabling Design Database Interoperability SANTA CLARA, Calif.--(BUSINESS WIRE)--The Interoperable PCell Library (IPL) Alliance announced today that an interoperability demonstration featuring six products from five alliance members is now available for online viewing at http://www.si2.org/interopdemo. In the demonstration, each tool operates on the same OpenAccess database, with full PCell functionality, without resorting to any translation or stream-out operations. The products shown in the demonstration include: * PyCells™ from Ciranova™ PyCells have also been tested for full interoperability with OpenAccess versions of Cadence® Virtuoso®. The demonstration includes schematic capture; layout editing with PyCell manipulations including changing parameters, stretch handles, and automatic abutment; design rule checking and DRC error overlay on layout. Throughout the demonstration, connectivity is maintained as the tools open, edit and save the database. The actual PyCell library used in the demonstration, including source code, is available for free download from the IPL Alliance web site at http://www.iplnow.com. PyCell Studio, the mechanism chosen by the IPL Alliance to create the proof-of-concept library, is available for free download from the Ciranova web site at http://www.ciranova.com. “The IPL Alliance members have worked hard to ensure that their tools interoperate with full functionality,” said Eric Filseth, CEO of IPL founding member Ciranova, Inc. “This joint demonstration shows a level of interoperability which is unprecedented in the EDA industry.” Interoperable PCell libraries have many advantages to semiconductor companies, foundries and EDA vendors. Semiconductor companies will be able to use common PCell libraries providing advanced functionality across multiple processes, reducing development and support costs while increasing layout flexibility. Foundries will be able to reduce their PDK development costs while dramatically increasing the number of tools they support. EDA vendors will also be able to reduce PDK development costs, while supporting a wider range of foundry partners. Inquiries regarding the online demonstration or the IPL Alliance may be directed to: dave@ciranova.com Ciranova, PyCell and PyCell Studio are trademarks of Ciranova, Inc. Cadence, Virtuoso and SKILL are registered trademarks of Cadence Design Systems, Inc. Calibre is a registered trademark of Mentor Graphics Corporation. AWR and Analog Office are registered trademarks of Applied Wave Research, Inc. Silicon Canvas and Laker are trademarks of Silicon Canvas, Inc. Silicon Navigator and RDE Framework are trademarks of Silicon Navigator, Inc. Synopsys is a registered trademark and Hercules is a trademark of Synopsys, Inc.
|
|
|
| ©2008 Business Wire. All of the news releases contained herein are protected by copyright and other applicable laws, treaties and conventions. Information contained in the releases is furnished by Business Wire's members, who warrant that they are solely responsible for the content, accuracy and originality of the information contained therein. All reproduction, other than for an individual user's personal reference, is prohibited without prior written permission. |
|
|
All
material on this site copyright © 2008 techfocus media, inc.
All rights reserved.
IC Design and Verification Journal Privacy Statement |