In this episode of Chalk TalkHD Amelia chats with Ravi Mahatme from ARM and King Ou from GLOBALFOUNDRIES about how IP and process solutions can help solve our power management problems.
Increased capability does not have to increase your cost. Arria V FPGAs provide the highest bandwidth and the most hard IP at the lowest price. In addition, by designing with Arria V FPGAs, you can save system costs, operating costs, and manufacturing costs.
GLOBALFOUNDRIES offers BCDliteTM foundry technology optimized for applications such as power management devices, audio amplifiers, displays and LED driver integrated circuits (ICs).
Because a fast and robust memory interface is crucial for many designers, Altera provides the fastest, most efficient, and lowest latency memory controllers, which allow designers to work with today’s higher speed memories quickly and easily. Designing with Arria V FPGAs not only helps to make designs successful but also ensures that implementation is fast and easy.
When you want it all, Arria® V devices provide the balance of cost and performance while delivering the lowest total power. Watch this exciting hardware demonstration of the Arria V FPGA's transceiver running at 6.375 Gbps and 10.3125 Gbps.
Timing closure is of critical importance in high-speed FPGA designs. This white paper focuses on the challenges that affect timing closure and discusses how simple HDL changes can help resolve timing issues and reduce the time needed to achieve timing closure.
Want the best performance from your 28-nm FPGA design? Find out how you can make optimal use of Altera's 28-nm architecture to maximize your system performance. Watch this 10-minute webcast to learn about: Our 28-nm architecture innovations, Recommended design optimization techniques and Quartus® II software automated optimization tool.
Are you using FPGAs to accelerate your system? Altera is exploring a new technology for FPGAs that will provide exciting and significant productivity gains for your high-performance systems. Watch this webcast to find out about Altera’s Open Computing Language (OpenCL™) program for FPGAs.
In this episode of Chalk TalkHD, Amelia chats with David Dye of Xilinx about how Hierarchical Design methodologies and Team Design can accelerate your next FPGA design and get those team members of yours working productively together. With these tools and techniques, two million logic elements won't seem like that much after all.
As various standard bodies finalize their 100G standards for transport, Ethernet, and optical interfaces, FPGAs play a vital role for early adopters of technology who want to design 100G production systems. Because of this, service providers are looking at emerging 40-GbE/100-GbE standards for their next-generation line card options. Altera’s Stratix V FPGAs solve the bandwidth problem by providing integrated 12.5-Gbps transceivers with hardened 100G PCS functions on the 28-nm technology node.