ARCHIVES - JANUARY 2008

FEATURE ARTICLES

A Bid to Simplify Flash Subsystem Design
by Bryon Moyer, IC Design and Verification Journal

45 nm From 30,000 ft
by Bryon Moyer, IC Design and Verification Journal

Burning the Secret Sauce
When Paranoia Impedes Progress

Endangered Elite
The Forgotten Foundation of Electronics

Spreading the Span
ChipX Rolls Hybrid ASIC

NEWSLETTERS

January 29, 2008 :: volume I, no. 04

January 22, 2008 :: volume I, no. 03

January 15, 2008 :: volume I, no. 02

January 8, 2008 :: volume I, no. 01

PRESS RELEASES

January 24, 2008

Agilent Technologies’ Large-Scale RFIC Design Software is First to Perform Multiple Simulations from Single License

Mentor Graphics Releases Updated Serial ATA Host and Device Controllers for Storage Applications

ProDesign Completes ASIC Prototyping Product Portfolio With the New CHIPit QuickSilver

Berkeley Design Automation Tackles Big Analog/RF Verification at EDSFair2008

January 23, 2008

ATopTech’s Aprisa Cuts the Physical Design Time of Sharp’s Multimillion-Gate System-on-Chip Design

Matching Moore's Law, Synopsys PrimeTime Delivers 2X Productivity Boost to Timing Signoff and Design Closure

January 22, 2008

Synopsys and Acceleware Deliver Hardware Accelerated Solution for Design of Optoelectronic Devices

Berkeley Design Automation Tackles Big Analog/RF Verification at EDSFair2008

OneSpin Solutions Complements Its 360 Module Verifier Formal Verification Solution With Standard Assertion Language Support

January 21, 2008

Synopsys IC Compiler Successfully Employed by Matsushita for First 45-nm SoC Design Tapeout

CoWare & STARC Integrate SystemC TLM Methodology

Calypto to Present RTL Power Optimization Solution at EDSFair 2008

CoFluent Design Delivers Model Viewer and Player for Streamlined Project Specifications and Communications

EVE and CoWare Forge Strategic Alliance

Novaflow to Demonstrate Silicon Canvas Laker Custom IC Design Software with Advanced Analog Automation

Real Intent Demonstrates Formal Verification Software for Bug Hunting, Verifying Clock Domain Crossing Signals, Assertions and Timing Constraints at EDSFair2008

January 18, 2008

Nangate Releases Library Creator Version 2.0

Carbon Design Systems to Exhibit at EDSFair 2008 in Yokohama, Japan January 24-25

January 17, 2008

Mentor Graphics Delivers the Industry’s First Physical Synthesis Solution for Altera Stratix III Device Family

Calypto Adds SLEC System-HLS to Product Line, Enabling ESL, Capturing Growing Market

January 16, 2008

Mentor Graphics Nucleus OS Offers a Seamless User Experience for Multimedia Devices

Synfora Integrates PICO Express with CoWare ESL 2.0 Solutions

EVE to Demonstrate Hardware/Software Co-Verification at EDSFair 2008

January 15, 2008

Future Waves Selects Berkeley Design Automation Analog FastSPICE™ for Full-Circuit RF-CMOS Tuner IC Verification

ISMI Introduces Guidelines to Protect IP in Semiconductor Industry

 

January 14, 2008

STARC Adopts Synopsys PrimeTime VX as the Variation-Aware Timing Tool for Its STARCAD-CEL Methodology

The MathWorks Announces New Product That Integrates Simulink with Green Hills MULTI

Calypto Adds SLEC System-HLS to Product Line, Enabling ESL, Capturing Growing Market

Test and Measurement Industry Trends Toward Software-Defined Instrumentation and Use of Multicore-Enabled Test Systems

Mentor Graphics and Calypto Design Systems Announce Customer-Proven Electronic System Level Synthesis and Verification Flow Featuring Catapult C Synthesis and SLEC Sequential Equivalence Checker

January 11, 2008

Mentor Graphics Extends EDGE MAJIC JTAG Support for Cavium Networks OCTEON Plus Family

January 10, 2008

Keithley ACS Version 3.2 Offers New Parallel Test and Parametric Die Sort Features for Higher Throughput

Mentor Graphics Announces 20th Annual PCB Technology Leadership Awards Program

January 9, 2008

Kilopass Collaborates with MagnaChip to Deliver Embedded Non-Volatile Memory Technology

Chip Estimate Named Finalist for 2008 DesignVision Award

Savant Company Inc. Announces Call for Sponsors and Speakers for the 6th International System-on-Chip (SoC) Conference, Exhibit, and Workshops

January 8, 2008

Carbon Design Systems’ Carbon Model Studio Selected as 2008 DesignVision Award Finalist

Staccato Communications Selects Denali's Verification IP for Next-Generation WiMedia Products

Silicon Canvas Laker Environment Integrates With Hercules Physical Verification Suite From Synopsys

OCP-IP Announces New Debug Specification

ZeBu-XXL from EVE Named 2008 DesignVision Award Finalist

AMIS Deploys Interra’s MC2 as Their Memory Development Platform

January 7, 2008

IEC Announces 2008 DesignVision Award Finalists and Recognizes Best Design Tools and Products for New Year

OCP-IP Announces Six New Members

iC-Haus Converts to Synopsys HSIM-XA for Their Zero-Defect Mixed-Signal Chips

January 4, 2008

Catalytic Inc. Acquires ESL Business from Celoxica

January 3, 2008

Magma Enables PLX Technology to Deliver PCI Express Gen 2 Switch Family On Time and On Budget

Lorentz Solution Announces National Semiconductor Adopts Lorentz’s PeakView for On-Chip Electromagnetic Design and Verification

January 2, 2008

Greensocs Wins OCP-IP Outstanding Contributor of the Year Award

DRAM Circuit Design: Fundamental And High-Speed Topics, 2nd Edition Available Now
All material on this site copyright © 2008 techfocus media, inc. All rights reserved.
IC Design and Verification Journal
Privacy Statement